IP: WORTH READING History of 8008?

[Dave Farber <dave@farber.net>]

------ Forwarded Message
From: gep2@terabites.com
Date: Sat, 11 May 2002 12:56:15 -0500
To: wharton@shasta.Stanford.EDU
Cc: dave@farber.net, joschmid@nortelnetworks.com
Subject: History of 8008?

Howdy!

> I just read the article you posted to Dave Farber's IP list.  Your history
of the 8008 is interesting, but I'm still a bit confused.

I'll try to resolve that!  :-)

> You began with the line,

>> Lest anyone be misled by the following, please note for the record ...

> That seems to say there's something in the original class announcement that
was false, misleading, or in need of correction.  Could you explain what it
is you're taking exception to?

Sure.

The line in question says:

>>> In 1969 Stan joined the then-startup Intel Corporation, where he
developed architecture specifications for the industry's first
microprocessors, including the Intel 4004 and 8080, for which he
shares the fundamental design patents.

You'll note that it says "he developed architecture specifications for the
industry's first microprocessors, including the Intel 4004 and 8080, for
which 
he shares the fundamental design patents."

That's misleading on SEVERAL grounds.

First, it suggests (strongly) that the 4004 and 8080 were "the industry's
first 
microprocessors" which totally ignores the 8008, which was in fact the
industry's first general-purpose eight-bit microprocessor on a single chip.

Second, it suggests that Stan designed the important architectural features
of 
the 8080 (which one might presume includes the instruction set, endian
choice, 
subroutine linking approach, register architecture, and so on and so forth)
when 
in fact those (for the 8008) were designed by Datapoint.  The 8080 is in
fact 
virtually identical, architecture-wise, with the (Datapoint-designed)
8008... 
the main difference being that the 8080 is in a bigger package and doesn't
multiplex the output pins like the (physically smaller) 8008 does, which
means 
the 8008 had to have more auxiliary circuitry to demux those lines.

I don't know what "fundamental" design patents Stan may have on the 8080,
but 
it's clear that the 8080 (which is in fact only a slightly modified 8008) is
"fundamentally" Datapoint's architecture and design.

I would have no reason to dispute that Stan maybe was involved with INTERNAL
design decisions, i.e. how the adder was designed or how the processor
INTERNALLY was architected and so forth (and I don't really know what he
actually did at Intel on the design, so that's speculation), but you ought
to 
understand that even here, Datapoint (Computer Terminal Corporation at the
time) 
already had a working processor (made of MSI and TTL parts) which in any
case 
implemented essentially the 8008 on one largeish (oh, maybe 8" x 15" or so)
and 
one smaller (about half that size) board.

The 8008 and the Datapoint 2200 share the same register architecture, the
same 
stack technique for subroutine linkage, the same instruction set (opcode
mnemonics, binary op codes, etc), I/O scheme, and more.  (They are in fact
all 
but identical, programmer-wise... the main difference being that the 8008
added 
a simple/direct "increment" instruction which the Datapoint 2200 did not
have). 

In fact, the instruction set and register architecture for what became the
8008 
was designed by a man named Vic Poor (who went on to become eventually Sr VP
of 
R&D for Datapoint).  Another fellow named Harry Pyle (a brilliant young man
who 
Vic came to meet through a common interest in ham radio) was the person who
chose the use of the hardware stack for subroutine linkage.  Harry Pyle went
on 
to become the key principal programmer who wrote the assembler, CTOS (the
2200's 
Cassette Tape Operating System), as well as the initial Databus high level
language compilers and runtime interpreters as well as later the first three
releases of Datapoint's Disk Operating System.  [I took over development
work on 
Datapoint's DOS in 1974.]  Another fellow named Gary Asbell, I believe, was
heavily responsible for Datapoint's own hardware implementation of the
processor 
and went on to become chief processor design guy at Datapoint.  Gary, for
example, designed the microsequencer which was key to the RIM, which was
Datapoint's initial implementation of the ARCnet LAN interface... the
world's 
first commercially available local area network... which was working in 1976
and 
was first shipped to an out-of-house customer (Chase Manhattan Bank, in
fact) in 
September 1977.  (That product was announced officially in NYC on Dec 1,
1977... 
which means this is the 25th anniversary year of the local area network, by
the 
way).

> (I.e., Stan Mazor's biographical sketch in the class announcement mentions
just the 4004 and 8080 processors, while your "rebuttal" relates just to
the 8008.  What's the discrepancy?)

The fact that the HUGE contribution of CTC/Datapoint in conceiving
(designing 
and in fact basically commissioning the product) of the first 8-bit
general-purpose microprocessor, which Intel didn't intend to make, was swept
under the rug as if it didn't happen!!

> Also, my understanding is that DataPoint planned to use the 8008 just to
control the CRT, and that any "general-purpose desktop microcomputer system"
capabilities would have required a different processor.  Are you saying the
8008 was a general-purpose CPU that would have performed both functions?

No.

Datapoint in fact had circuitry already which controlled the CRT (not just
for 
the 2200, but also for their 24x80 3000, 3360, and 3300 display terminals),
and 
the 8008 would not have been nearly fast enough to do that.  Datapoint used
what 
they called a "diddle scan" (which in fact Datapoint held a patent on) which
is 
what allowed Datapoint to in fact use MOS memories (shift registers!) for
the 
screen refresh buffer.  The diddle scan differs from a conventional raster
scan 
in that a diddle scan displays a given character completely,
COLUMN-BY-COLUMN in
terms of pixels, before continuing to draw the next character of the row to
the 
screen.  After the 80 characters are displayed on one row, it then proceeds
to 
display the next row of characters, and so forth.  The important thing about
the 
diddle scan is that a 1024-byte shift register memory can contain the entire
screen refresh memory for a 12 x 80 display, cycling once around for each
complete screen refresh, without the need to refetch the bytes of a given
row 
for each raster scan line like 'normal' raster scan displays need to do.

The 2200 was going to use the 8008 (and in fact used its own implementation
of 
the 8008) to run the CTOS, compilers, assembler, editor, terminal emulators,
device drivers for the digital cassette tape drives, etc etc... in fact all
the 
functions of a general-purpose business microcomputer system.  Unlike the
hobbyist Altair and such which followed, however, (and which were
essentially 
one-chip-microprocessor versions of the bare-CPU "minicomputer" systems of
the 
era) the Datapoint 2200 was a COMPLETE and SELF-CONTAINED system which was
the 
size and shape of an office electric typewriter.  The 2200 also eliminated
console switches and console lights (near-obligatory on computers of the
time) 
and used instead the keyboard and display for 'everything'.  The 2200 booted
by 
rewinding and transferring (in hardware) the first [boot!] block on the tape
in 
the rear cassette tape drive into memory starting at location zero, and then
passing control to memory location zero.  That initial boot block contained
the 
logic necessary, obviously, to further initialize the system and boot the
rest 
of the operating system from the same rear tape.

Note that the main memory of the Datapoint 2200 (type 1, the first
incarnation 
of the 2200) *also* used MOS shift register memory... which meant that for
performance reasons one tended to favor inline code, which could be executed
by 
stepping to the next location in memory.  Subroutine call-and-return meant
that 
one had to wait for the memory to cycle fully around to get back to the
return 
location so execution of the caller routine could be resumed!  :-)
Likewise, 
JUMP instructions took a variable amount of time depending on how long it
took 
to cycle the memory around to the desired address.  :-)

The use of shift register main memory also dictated the use of the
little-endian 
architecture for the computer (and which Intel of course still uses to this
day), since one wanted to be able to increment (or otherwise add to) a
(two-byte) address (again, frequently the second and third bytes of a jump
instruction... since that meant not having to fetch out-of-line memory which
was 
slow!) and propagate the carry into the high-order byte without having to
"waste" a complete cycle-around of the memory.

The Type 1 2200 had a maximum of 8K bytes of MOS shift register main memory,
2K 
was the minimum and you could add up to three more 2K memory cards.  The
Type 1 
was fairly rapidly supplanted by the Type 2, which was nearly identical
programming-wise but which changed the machine to type 2102 1kbit DRAM chip
main 
memory... coming with 4K bytes and with the ability to add (again) three
more 
boards, totalling 16K bytes of memory in a fully-configured 2200.  The Type
2 
machine, while capable of running all Type 1 programs, was obviously faster
since the 'memory cycling' wasn't any longer a concern and permitted writing
much more ambitious programs.

The Type 2 2200, using a Datapoint model 350 (later called the 9350) disk
cartridge drive (a 2.5Mb unit based on the then-ubiquitous Diablo series 30
drive) and Datapoint's DOS, was capable of supporting (and astonishingly
well, 
in fact!) up to 8 Datapoint 3360 display terminals in an innovative
multiuser 
transaction-oriented business configuration based on Datapoint's DATASHARE
programming language, which was a further development of the DATABUS
business 
programming languages which ran under CTOS.

There were a whole number of reasons why a machine with the seemingly
limited 
capacity of the Type 2 2200 was able to support eight terminals so well (for
example, the size of program allowed EACH terminal was a compilation listing
typically well over a hundred printout pages long, and each terminal could
be 
running of course a different program concurrently)... including a very
compact 
bytecode interpreter, a specialized virtual-memory architecture where data
used 
by each user program was permanently resident but bytecode (which was never
modified) was dynamically swapped into (and executed directly out of) speed
buffers in the disk controller, and the use of one-millisecond timer
interrupts 
to handle serial I/O to and from the terminals from the permanently
resident-in-memory user data areas.

Note again that your understanding as you said above (quoting again):

> Also, my understanding is that DataPoint planned to use the 8008 just to
control the CRT, and that any "general-purpose desktop microcomputer system"
capabilities would have required a different processor.  Are you saying the
8008 was a general-purpose CPU that would have performed both functions?

...was WAY wide of the mark, given that all of the functionality I'm
describing 
here (eight DATASHARE users running business-oriented high level language
programs on serial terminals via a multiuser business transaction-oriented
operating system, a full DOS operating system with dynamic file structure
(including ISAM/physical-random/sequential access, automatic space
allocation 
(that even IBM's *mainframe* DOS didn't have back then), a subdirectory disk
architecture, and more all ran (and quite respectably in fact) on the 2200
Type 
2 computer system which used Datapoint's MSI-and-TTL implementation of the
8008. 
 So YES, I'm saying that the 8008 was in fact VERY MUCH a general-purpose
CPU, 
AND that the architecture was absolutely used that way by Datapoint in the
2200. 
:-))

> Would you mind elaborating on this?

I've covered the topic (for the record!) reasonably well here, and would be
glad 
to provide any further details you require if I can.

> And could you point me to the source of information you have on the Datapoint
2200 architecture?

Sure.

The definitive public document on the original Datapoint 2200 is a looseleaf
binder (published by Computer Terminal Corporation) called the Datapoint
2200 
Programmer's Manual, (which incorporates a "Reference Manual" completely
describing the CPU hardware, instruction set, and built-in I/O facilities of
the 
2200).  The rest of the binder contains tabbed sections:

   Introduction
   The Operating System (CTOS)
   Assembler Source Code Editor
   The Assembler
   Advanced Operating System Command and Subroutine Usage
     (keyboard/display/catalog/debugger/symbolic loader/tape file
access/etc)
   Appendix (containing a complete assembler source listing of the CTOS
operating system, dated 02/05/71 in fact).

The Databus business programming language (which for CTOS came in at least
five 
or six versions having different combinations of features, and thus being
able 
to run in larger or smaller memory capacity processor configurations) was
documented in separate books (but used the exact same programmer's editor as
the 
"assembler source code editor" mentioned above in the Programmer's Manual).

Note that the public announcement of the 8008 appeared in Electronics
magazine 
issue of March 13, 1972 (page 143 in fact... sample quantities were being
offered by Intel at $200 each.)  The Electronics article, of course, does
not 
mention Computer Terminal Corporation or the Datapoint 2200.  :-)   However,
it's very clear (based on the facts that Datapoint had a running operating
system and user documentation for the complete and user-available 2200
system 
more than a year before the public announcement of the 8008, and the fact
that 
the architecture, assembler mnemonics, and even binary op codes are
identical to 
those of the 8008) that the "Intel" 8008 was indeed Datapoint's design.
   
> Thanks much.  

You're welcome!  Glad to have an opportunity to get a bunch of this stuff on
the 
record.

>  --John Wharton
    650-856-8051

Gordon Peterson                  http://personal.terabites.com/
Support the Anti-SPAM Amendment!  Join at http://www.cauce.org/
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